nibo/iodefs_nibo2.h

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/*  BSD-License:

Copyright (c) 2007 by Nils Springob, nicai-systems, Germany

All rights reserved.

Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:

  * Redistributions of source code must retain the above copyright notice,
    this list of conditions and the following disclaimer.
  * Redistributions in binary form must reproduce the above copyright notice,
    this list of conditions and the following disclaimer in the documentation
    and/or other materials provided with the distribution.
  * Neither the name nicai-systems nor the names of its contributors may be
    used to endorse or promote products derived from this software without
    specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

#define IO_LEDS_RED_PORT  PORTE
#define IO_LEDS_RED_MASK  0xff
#define IO_LEDS_RED_DDR   DDRE

#define IO_LEDS_GREEN_PORT  PORTC
#define IO_LEDS_GREEN_MASK  0xff
#define IO_LEDS_GREEN_DDR   DDRC


#define IO_LED_WHITE_PORT  PORTB
#define IO_LED_WHITE_BIT   5
#define IO_LED_WHITE_DDR   DDRB

#define IO_DISP_LIGHT_PORT  PORTB
#define IO_DISP_LIGHT_BIT   6
#define IO_DISP_LIGHT_DDR   DDRB

#define IO_LED_RG_PORT  PORTB
#define IO_LED_RG_BIT   7
#define IO_LED_RG_DDR   DDRB

#define IO_AUDIO_PORT  PORTB
#define IO_AUDIO_BIT   4
#define IO_AUDIO_DDR   DDRB



#define IO_LINE_FLOOR_EN       IO_LINE_FLOOR_EN
#define IO_LINE_FLOOR_EN_PORT  PORTF
#define IO_LINE_FLOOR_EN_BIT   6
#define IO_LINE_FLOOR_EN_DDR   DDRF


#define AN_FLOOR_R    0        
#define AN_FLOOR_L    1        
#define AN_LINE_L     2        
#define AN_LINE_R     3        
#define AN_VBAT       7        
#define IO_DISPLAY_RS       IO_DISPLAY_RS
#define IO_DISPLAY_RS_PORT  PORTG
#define IO_DISPLAY_RS_BIT   3
#define IO_DISPLAY_RS_DDR   DDRG

#define IO_DISPLAY_RW       IO_DISPLAY_RW
#define IO_DISPLAY_RW_PORT  PORTG
#define IO_DISPLAY_RW_BIT   4
#define IO_DISPLAY_RW_DDR   DDRG

#define IO_DISPLAY_EN       IO_DISPLAY_EN
#define IO_DISPLAY_EN_PORT  PORTG
#define IO_DISPLAY_EN_BIT   2
#define IO_DISPLAY_EN_DDR   DDRG

#define IO_DISPLAY_CS1       IO_DISPLAY_CS1
#define IO_DISPLAY_CS1_PORT  PORTG
#define IO_DISPLAY_CS1_BIT   0
#define IO_DISPLAY_CS1_DDR   DDRG

#define IO_DISPLAY_CS2       IO_DISPLAY_CS2
#define IO_DISPLAY_CS2_PORT  PORTG
#define IO_DISPLAY_CS2_BIT   1
#define IO_DISPLAY_CS2_DDR   DDRG

#define IO_DISPLAY_RST       IO_DISPLAY_RST
#define IO_DISPLAY_RST_PIN   PINB
#define IO_DISPLAY_RST_PORT  PORTB
#define IO_DISPLAY_RST_BIT   0
#define IO_DISPLAY_RST_DDR   DDRB

#define IO_DISPLAY_PORT  PORTA
#define IO_DISPLAY_PIN   PINA
#define IO_DISPLAY_DDR   DDRA


#define IO_EXT_A_PORT  PORTD
#define IO_EXT_A_PIN   PIND
#define IO_EXT_A_BIT   6
#define IO_EXT_A_DDR   DDRD

#define IO_EXT_B_PORT  PORTD
#define IO_EXT_B_PIN   PIND
#define IO_EXT_B_BIT   5
#define IO_EXT_B_DDR   DDRD

#define IO_EXT_C_PORT  PORTD
#define IO_EXT_C_PIN   PIND
#define IO_EXT_C_BIT   3
#define IO_EXT_C_DDR   DDRD

#define IO_EXT_D_PORT  PORTD
#define IO_EXT_D_PIN   PIND
#define IO_EXT_D_BIT   2
#define IO_EXT_D_DDR   DDRD

#define IO_RESET_CO_PORT  PORTD
#define IO_RESET_CO_BIT   7
#define IO_RESET_CO_DDR   DDRD


#define IO_INPUT_1       IO_INPUT_1
#define IO_INPUT_1_PORT  PORTD
#define IO_INPUT_1_PIN   PIND
#define IO_INPUT_1_BIT   4
#define IO_INPUT_1_DDR   DDRD

#define IO_INPUT_2       IO_INPUT_2
#define IO_INPUT_2_PORT  PORTF
#define IO_INPUT_2_PIN   PINF
#define IO_INPUT_2_BIT   5
#define IO_INPUT_2_DDR   DDRF

#define IO_INPUT_3       IO_INPUT_3
#define IO_INPUT_3_PORT  PORTF
#define IO_INPUT_3_PIN   PINF
#define IO_INPUT_3_BIT   4
#define IO_INPUT_3_DDR   DDRF


#define IO_ISP_SCK_PORT  PORTB
#define IO_ISP_SCK_BIT   1
#define IO_ISP_SCK_DDR   DDRB

#define IO_ISP_MOSI_PORT  PORTB
#define IO_ISP_MOSI_BIT   2
#define IO_ISP_MOSI_DDR   DDRB

#define IO_ISP_MISO_PORT  PORTB
#define IO_ISP_MISO_PIN   PINB
#define IO_ISP_MISO_BIT   3
#define IO_ISP_MISO_DDR   DDRB

#define IO_ISP_SS         IO_DISPLAY_RST

#define IO_I2C_SDA_PORT  PORTD
#define IO_I2C_SDA_PIN   PIND
#define IO_I2C_SDA_BIT   1
#define IO_I2C_SDA_DDR   DDRD

#define IO_I2C_SCL_PORT  PORTD
#define IO_I2C_SCL_PIN   PIND
#define IO_I2C_SCL_BIT   0
#define IO_I2C_SCL_DDR   DDRD


#define I2C_BUF_SIZE 20
#define I2C_TWBR_INIT 72   /* 100 kHz */
//#define I2C_TWBR_INIT 12   /* 400 kHz */



#define IRCO_I2C_ID 42

#define MOTCO_I2C_ID 44

#define COPRO_I2C_ID 46